1. Field of the Invention
This invention generally relates to a frequency synthesizer for use in a multichannel radio apparatus and more particularly to an improved frequency synthesizer which can perform a pulling process thereof at high speed and can substantially lower power consumption thereof in comparison with the prior art.
2. Description of the Related Art
A frequency synthesizer is an important component of a multichannel radio or wireless apparatus. Thus, it is a problem of great concern in the multichannel radio apparatus to realize high-speed pulling characteristics thereof. Further, it is also a problem of great concern in a mobile radio apparatus to achieve low power consumption therein. Hereinafter, a conventional digital type phase initializing circuit with reference to FIG. 4 will be described.
In FIG. 4, reference numeral 1 indicates a base oscillator outputting signals of which frequencies are divided by a reference frequency divider 2. Usually, a temperature compensating crystal oscillator (TCXO) is used as the base oscillator. The thus obtained signals are inputted into a phase comparator (P.C.) 3 as reference signals. Further, in this figure, reference numeral 4 indicates a voltage-contolled oscillator (hereunder abbreviated as VCO) outputting signals of which frequencies are divided by a variable frequency divider 5. Moreover, output signals of the variable frequency divider 5 are also inputted into the phase comparator 3. An output signal of the phase comparator 3 corresponds to a phase difference between the output of the reference frequency divider 2 and that of the variable frequency divider 5 and are further inputted through a charge pump (C.P.) 6 and a low-pass filter 7 into a control terminal of the VCO 4 whereup a control operation of the phase difference is effected. By this operation, stabilized outputs of the VCO 4, which are synchronized with the difference signal, are obtained. Furthermore, the frequency of the output signal of the VCO 4 can be changed by changing a frequency division ratio of the variable frequency divider 5. This method is applied to the multichannel radio apparatus.
Further, for the purpose of the lowering power consumption of the frequency synthesizer, it is devised that the power is turned off when unnecessary. This is generally called an intermittent operation. In case where the above described frequency synthesizer is intermittently operated, it is needed for matching of the system and owing to effects of the intermittent operation to stabilize the frequency within a short period of time. In order to realize this, the following means is devised. That is, when the power is turned off in the intermittent operation, control voltage for providing signals having necessary or desired frequency is held by a low-pass filter 7. At that time, charge to be held may be changed in accordance with the state of the charge pump 6. Thus, a loop switch 8 is provided between the charge pump 6 and the low-pass filter 7 and is opened when the power is turned off. On the other hand, when the power is turned on and the loop switch 8 is closed, input signals to the phase comparator 3 (that is, the output signal of the reference frequency divider 2 and that of the variable frequency divider 5) have the same frequency but are different in phase from each other and therefore a phase difference signal may be generated by the phase comparator 3. Thereby, there may be caused change in frequency among an output of the phase comparator 3 and the input signals thereto. Thus, it takes much time to stabilize frequency. As a countermeasure to this, is devised a system in which the reference frequency divider 2 is initialized by an output of the variable frequency divider 5, thereby putting the signal outputted from the variable frequency divider 5 and that outputted from the reference frequency divider 2 into a state in which these signals are in phase with each other and thus forming a loop in the frequency synthesizer. Further, reference numeral 9 indicates a control circuit for controlling the reference frequency divider 2 and the loop switch 8 in the manner as described above.
This conventional system, however, has a drawback that the output signals of the frequency dividers 2 and 5 cannot be sufficiently in phase with each other and thus it takes time for performing a pulling process (which comprises a pull-in and lock-in sub-processes). Furthermore, this conventional system has another drawback that, in case of a low-voltage operation, data may be changed under the influence of noises superposed on signals inputted into data inputting portion.
Thus, the present invention is accomplished to eliminate the above described drawbacks of the conventional phase initializing circuit.